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AMIS-721250: Contact Image Sensor
Data Sheet
1.0 General Description
AMI Semiconductor's AMIS-721250 (PI6050D) contact image sensor (CIS) is a selectable 600 or 1200 dot per inch (dpi) resolution linear image sensor, which employs AMI Semiconductor's proprietary CMOS image sensing technology. The sensor contains an onchip output amplifier, power-down circuitry and parallel transfer features that are uniquely combined with the present-day active-pixelsensor technology. The image sensors are designed to be cascaded end-to-end on a printed circuit board (PCB) and packaged in an image sensing module. Applications for the sensor array includes facsimiles, PC scanners, check readers, and office automation equipment. Figure 1 is a block diagram of the sensor. Each sensor consists of 688 active pixels, their associated multiplexing switches, buffers, and an output amplifier circuit with a power down feature. The sensors pixel-pixel spacing is approximately 21.15m. The size of each sensor without the scribe lines is 14560m by 425m.
2.0 Key Features
* * * * * * * * * * * * 600 or 1200dpi selectable resolutions 344 or 688 image sensor elements (pixels) 21.15m (1200dpi) pixel center-to-center spacing (47.24dots/mm) On-chip amplifier Single 5.0V power supply 3.3V input clocks 3.0MHz maximum pixel rate Parallel / integrate and transfer Power-down circuit High sensitivity Low power Low noise
14560m 21.15m 1 1 2 2 3 3 4 4 Row of 688 Pixels (1200dpi) or Selectable Row of 344 Pixels (600dpi) and Video Line Multiplexer 342 686 343 687 344 688
Parallel Transfer, Storage Cells and Readout Registers
425m
Amplifier, PowerDown and Offset Control SI GBST CLK SIC SC VDD VOUT VSS VREF SO
Figure 1: Sensor Block Diagram
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AMIS-721250: Contact Image Sensor
3.0 Unique Features
There are six unique features incorporated into the AMIS-721250 which improve the sensor's performance. 3.1 Pixel-to-Pixel Offset Cancellation Circuit
Data Sheet
The sensor employs a pixel-to-pixel offset cancellation circuit, which reduces the fix pattern noise (FPN), and amplifier offsets. In addition, this innovative circuit design greatly improves the optical linearity and low noise sensitivity. 3.2 Parallel Integrate, Transfer and Hold The sensor has a parallel integrate, transfer and hold feature, which allows the sensor to be read out while photon integration is taking place. These features are approached through the use of an integrate-and-hold cell, located at each pixel site. Each pixel's charge is read from its storage site as the sensor's shift register sequentially transfers each pixel's charge onto a common video line. 3.3 Dual Scan Initiation Inputs, GBST and SI Each sensor has two scan initiation inputs, the global start pulse (GBST) and the start pulse (SI), which are compatible with standard 3.3V CMOS clocks. These clocks help to reduce the sensor-to-sensor transition FPN by initializing and preprocessing all sensors simultaneously before they start their readout scan. The internal shift register starts the scan after GBST is clocked in on the falling edge of the clock input (CLK). The start input control (SIC) selects the first sensor in a sequence of cascaded sensors to operate with 55 clock cycles of delay by connecting it to Vdd and to ground for all subsequent sensors. Then, only the first sensor clocks out 110 inactive pixels (55 clocks cycles) before accessing its first active pixel. During these 55 clock cycles, the first sensor and all of the subsequent cascaded sensors cycle through their pre-scan initialization process. After initialization, only the first sensor starts its read cycle with its first-active pixel appearing on the 56th clock cycle. The second and subsequent sensors await the entry of their SI. Furthermore, the first sensor's SI is left unconnected, while the subsequent sensors all have their SI's connected to the SO of their respective preceding sensor. The external scan SI is connected to all of the sensors' GBST inputs. For example in the 1200dpi mode, when the first sensor completes its scan, its end-of-scan (SO) appears on the falling edge of 389 clock cycle after the entry of GBST and 20 pixels before its last pixel, in order to have a continuous pixel readout between sensors in a module. This SO enters as the SI clock of the second and subsequent sensors; hence all subsequent sensors will start their register scan after each of the preceding sensors completes its scan. 3.4 Power Saving Each sensor incorporates a power-saving feature such that each chips amplifier is only turned on when its pixels are ready to be read out. 3.5 Common Reference Voltage between Cascaded Sensors Each sensor has an input/output bias control (VREF), which serves as an offset voltage reference. Each bias control pad is connected to an internal bias source and tied to its own amplifier's reference bias input. In operation, these pads on every sensor are connected together. Each sensor then "shares" the same bias level to maintain a constant bias among all of the sensors. 3.6 Selectable Resolutions of 600dpi or 1200dpi The switch control input (SC) is connected to ground or to Vdd to set the sensor to operate in the 600dpi or 1200dpi mode, respectively. In the 1200dpi mode, all 688 pixels are clocked out, whereas in the 600dpi mode, pixels one and two are combined, three and four are combined and so on up to pixels 687 and 688 being combined. One half of the pixel amplifiers and one half of the scanning register are then disabled. As a result, sensitivity in the 600dpi mode will be twice that of the 1200dpi mode. The 600dpi readout time will be approximately half of the 1200dpi readout time. Unlike a CCD array, both the 600dpi and 1200dpi arrays can operate with the same clock frequency.
th
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AMIS-721250: Contact Image Sensor
4.0 Functional Description
4.1 Input/Output Terminals
Data Sheet
The AMIS-721250 image sensor has ten input and output (I/O) pads. Their symbols and function descriptions are listed in Table 1.
Table 1: Input and Output Terminals Signal I/O Description Start pulse: SI I Input to start a line scan (see discussion of the sensors unique features for further details) Global start pulse: GBST I Globally initializes the start inputs of all sensors and starts the scanning process of the first sensor (see discussion of the sensors unique features for further details) Clock: CLK I Clock input for the shift register Start input control: SIC I Input to control the Start Pulse to the first sensor (see discussion of the sensors unique features for further details) Switch control: SC I Selects the 600 or 1200dpi mode (see discussion of the sensors unique features for further details) VDD I Power supply Video output voltage: VOUT O Output video signal from the amplifier VSS I Ground Reference voltage: VREF I/O Reference input voltage for the amplifier output. Sets the output's reset (dark) level. End of scan pulse: SO O Output from the shift register at the end of a scan
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AMIS-721250: Contact Image Sensor
4.2 Bonding Pad Layout Diagram Figure 2 shows the bonding pad locations for the AMIS-721250 sensor.
14560m
Data Sheet
425m
Y
SI
GBST
CLK
SIC
SC
VDD
VOUT
VSS
VR
SO
X X
Pad Location Table Pad SI GBST CLK SIC SC VDD VOUT VSS VREF SO Location Start Pulse Global Start Pulse Clock Start Input Control Switch Control Power Supply Video Output Voltage Ground Reference Voltage End of Scan Pulse Y 30 30 30 30 30 34 30 34 30 30 X 1000 3442 4199 4590 4945 5414 5820 10549 10909 13259
Notes: 1. The drawing is not to scale. 2. The die length and width are given in the above sensor die figure 3. Pad locations are listed in the Pad Location Table eg.
Y X X
SI
GBST
4. Each pad is 120 x 80um 5. All dimensions are in um 6. Die size does not include the scribe line
Figure 2: AMIS-721250 Bonding Pad Layout
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AMIS-721250: Contact Image Sensor
4.3 Wafer Scribe Line Figure 3 outlines the scribe line dimensions surrounding the sensor die on a wafer.
Data Sheet
60m
15m
425m
55m
14560m
55m
60m
Figure 3: Wafer Scribe Line
5.0 Electro-Optical Specifications
Table 2 lists the electro-optical specifications of the AMIS-721250 sensor at 25C and Vdd = 5.0V.
Table 2: Electro-Optical Specifications Parameter (1) Number of pixels (1) Pixel-to-pixel spacing (2) Sensitivity @ 600dpi Sensitivity @ 1200dpi (3) Saturation voltage (4) Photo-response non-uniformity (5) Adjacent photo-response non-uniformity (6) Dark output voltage level (7) Dark output non-uniformity (8) Random thermal noise (rms) (9) Sensor-to-sensor photo-response non-uniformity (10) Photo response linearity Analog output drive current Symbol Min. 344 or 688 42.3 / 21.15 Typ. Max. 344 or 688 42.3 / 21.15 Units m V / uJ / cm 15 15 1.7 100 3.0 10 2 >1.0 Volts % % V mV mV % % mA
2
Sv VSat Up Upn Vd Ud Vno Usensor PRL Iout
1220 610 1.65
Notes for Table 2 are listed on the next page under "Definitions of Electro-Optical Specifications".
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AMIS-721250: Contact Image Sensor
5.1 Definitions of Electro-optical Specifications
Data Sheet
All electrical specifications are measured at a pixel rate of 2.5MHz, a temperature of 25 C, Vdd=5.0V, Vref=1.7V and at an integration time of 2.2ms for 600dpi and 4.4ms for 1200dpi. The average output voltage (Vpavg) is adjusted to approximately 1.0V, unless stated otherwise. The modules' internal Green LED (525 20nm) was used as the light source for measurements requiring illumination. As a guideline, the recommended load on the output should be 1K1.
2. 3.
4. 5. 6. 7. 8. 9. 10. 11.
The switch control input (SC) is connected to ground or to Vdd to set the sensor to operate in the 600dpi or 1200dpi mode, respectively. In the 1200dpi mode, all 688 pixels are clocked out, whereas in the 600dpi mode, pixels one and two are combined, three and four are combined and so on up to pixels 687 and 688 being combined. One half of the pixel amplifiers and one half of the scanning register are then disabled. As a result, sensitivity in the 600dpi mode will be twice that of the 1200dpi mode. The 600dpi readout time will be approximately half of the 1200dpi readout time. Sensitivity (Sv) is defined as the slope of the Vpavg vs. Exposure curve. Saturation voltage (VSat) is defined as the maximum video output voltage swing measured from the dark level to the saturation level. It is measured by using the module LED light source with the module imaging a uniform white target. The LED light level is increased until the output voltage no longer increases with an increase in the LED brightness. The dark level is set by the voltage on VREF and is recommended to be set externally to a voltage of 1.7V for optimal module operation. Photo-response non-uniformity (Up+, Up-, Up_total): Up+ = ((Vpmax-Vpavg)/Vpavg) x 100%, Up- = ((Vpavg-Vpmin)/Vpavg) x 100%, and Up_total is the absolute value of (Up+) + (Up-), where Vpmax is the maximum pixel output voltage in the light, Vpmin is the minimum pixel output voltage in the light and Vpavg is average output voltage of all pixels in the light. Total photo-response non-uniformity (Up_total). Adjacent photo-response non-uniformity (Upn): Upn = ABS (Max ((Vpn - Vpn+1) / Min (Vpn, Vpn+1))) x 100%, where Vpn is the pixel output voltage of pixel n in the light. Dark output voltage (Vd): Vd is the average dark output level and is essentially the offset level of the video output in the dark. The dark level is set by the voltage on VREF and is recommended to be set externally to a voltage of 1.7V for optimal module operation. Dark output non-uniformity (Ud): Ud = Vdmax-Vdmin, where Vdmax is the maximum pixel output voltage in the dark and Vdmin is the minimum pixel output voltage in the dark. Random thermal noise (rms), (Vno) is the standard deviation of n pixels in the dark. A sample size n = 64 was used. A 3mV rms value has a peak-peak equivalent of 18mV. Sensor-to-sensor photo-response non-uniformity (Usensor). Usensor = (Vpavg - Wavg) / Wavg), where Wavg is the average output of all sensors on the same wafer that pass all other specifications. Photo-response linearity (PRL): Photo-response linearity is defined as the max. deviation of response compared to a best fit line. The data points plotted are those that lie within 10 percent of the saturation level and 90 percent of the saturation level. Outside these ranges the module is approaching non-linearity.
6.0 Recommended Operating Conditions
Table 3 lists the recommended operating conditions @ 25C.
Table 3: Recommended Operating Conditions @ 25 C Parameter Power supply (1) Clock input voltage high level (1) Clock input voltage low level Power supply current Reference voltage
(3) (2)
Symbol Vdd
Min. 4.5 3.1 0
IDD (sensor selected) IDD (sensor not selected) VREF 1.3 0.25 0.5 Tint 248 230
Typ. 5.0 3.3 0 8 4 1.7 1.25 2.5
Max. 5.5 3.5 0.8 10 5 1.7 1.5 3.0
Units V V V mA mA V MHz MHz s s / die
Clock frequency (4) Pixel rate (5) Integration time (line scan rate) First die Subsequent die (6) Clock pulse duty cycle
Notes: 1. 2. 3. 4. 5.
50
%
6.
This applies to all clocks; GBST, SI and CLK, the CLK line having a capacitance of approximately 20pF. The dark level is set by the voltage on VREF and is recommended to be set externally to a voltage of 1.7V for optimal module operation. Although the device will operate with a pixel rate of less than 500kHz, it is recommended that the device be operated above 500kHz to maintain performance characteristics. Operating below 500kHz may result in leakage current degradation. Two pixels are clocked out for every clock cycle. Tint is the integration time of a single sensor and is the time between two start pulses. The minimum integration time is the time it takes to clock out 55 inactive pixels and 688 active pixels for the 1200dpi mode, or 55 inactive pixels and 344 active pixels for the 600dpi mode, at a given frequency. However, if several sensors are cascaded together in a module then the minimum integration time for the 1200dpi mode is the time it takes to clock out 55 inactive pixels and 688 active pixels from the first sensor and 688 pixels from each of all subsequent sensors, at a given frequency. Similarly, for cascaded sensors in the 600dpi mode, the minimum integration time is the time it takes to clock out 55 inactive pixels and 344 active pixels from the first sensor and 344 pixels from each of all subsequent sensors, at a given frequency. The clock duty cycle is defined as the ratio of the positive duration of the clock to its period.
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AMIS-721250: Contact Image Sensor
7.0 Absolute Maximum Ratings
Table 4 lists the absolute maximum ratings.
Table 4: Absolute Maximum Ratings Parameter Power supply voltage (Vdd) Clock input voltage high level Clock input voltage low level Operating temperature Operating humidity Storage temperature Storage humidity
Note: 1. Applies to all clocks; GBST, SI and CLK.
(1) (1)
Data Sheet
Max. 8 Vdd + 0.5 -0.5 -10 to +50 +10 to +85 -25 to +75 +10 to +90
Units V V V C RH% C RH%
8.0 Timing Requirements
Table 5 lists the timing requirements for the 600 and 1200dpi modes, and their associated timing diagrams are shown in Figures 4-9.
Table 5: Timing Requirements Parameter Clock (CLK) period Clock (CLK) pulse width Clock (CLK) duty cycle (1) Data setup time Data hold time
(1) (2)
Symbol CLKp CLKpw Tset Thold CLKrt CLKft
Min. 666
Typ. 800 400 50
Max. 4000
20 25 70 70 50 50 70 70 100 30
Units ns ns % ns ns ns ns ns ns ns ns ns ns
Clock (CLK) rise time Clock (CLK) fall time
(2) (2)
End of scan (SO) rise time End of scan (SO) fall time
SOrt SOft
(3)
(2)
Global start (GBST) rise time Global start (GBST) fall time Pixel rise time Pixel fall time
Notes: 1. 2. 3. 4. 5.
(4,5)
GBSTrt GBSTft Prt Pft
(3)
(4,5)
The shift register will load on all falling CLK edges, so setup and hold times (Tset, Thold) are needed to prevent the loading of multiple start pulses. This would occur if the GBST remains high during two fallings edges of the CLK signal. See Figure 7. SI starts the register scanning and the first active pixel is read out on the 56th clock of the CLK signal. However, when multiple sensors are sequentially scanned, as in CIS modules, the SO from the predecessor sensor becomes the SI to the subsequent sensor, hence the SI clock = the SO clock. As discussed under the third unique feature, the GBST starts the initialization process and preprocesses all sensors simultaneously in the first 55 clock cycles (110 pixels) before the first pixel is scanned onto the video line from the first sensor. The transition between pixels does not always reach the dark offset level as shown in the timing diagrams, see Vout. The timing diagrams show the transition doing so for illustration purposes; however a stable pixel sampling point does exist for every pixel. The pixel rise time is defined as the time from when the CLK's rising edge has reached 50 percent of its maximum amplitude to the point when a pixel has reached 90 percent of its maximum amplitude. The pixel fall time is defined as the time from when a pixel's charge begins to decrease from its maximum amplitude to within 10 percent of the lowest point before the next pixel begins to rise.
Figures 4 and 5 show the initialization of the first sensor in relation to its subsequent cascaded sensors. The SIC selects the first sensor to operate with 55 clock cycles of delay by connecting it to Vdd on the first sensor and to ground for all of the subsequent sensors. Hence the first sensor will operate with 110 inactive pixels being clocked out before its first active pixel is clocked out.
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AMIS-721250: Contact Image Sensor
Data Sheet
GBST
CLK SO VOUT
1
2
3
52
53
54
55
56
57
58
59
217
218
219
223
224
225
226
227
323
324
325
326
340
341
342
343
344
339
338
336
337
335
1 110 Inactive Pixels (55 Clocks)
2
3
4
5
6
344 Active Pixels (172 Clocks)
Figure 4: Overall Timing Diagram for the 600dpi Mode
GBST
CLK SO VOUT
1
2
3
52
53
54
55
56
57
58
59
389
390
391
395
396
397
398
399
667
668
669
670
684
685
686
687
688
683
682
681
680
1 110 Inactive Pixels (55 Clocks)
2
3
4
5
6
679
688 Active Pixels (344 Clocks)
Figure 5: Overall Timing Diagram for the 1200dpi Mode
Figures 6 and 7 detail the timing of the CLK, GBST, Vout, and SI/SO signals in further detail, which have the same timing requirements for both the 600 and 1200dpi modes. The rise and fall times are listed in Table 5. In Figure 7, note that pixel 111 is the first active pixel.
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AMIS-721250: Contact Image Sensor
CLKpw CLKpw CLKp
Data Sheet
CLK
Thold Tset
50% CLKrt CLKft
GBST
GBSTrt GBSTft Prt 90%
VOUT
Pft 10%
SI/SO
SI/SOrt SI/SOft
Figure 6: Rise and Fall Times for both the 600/1200dpi Modes
CLK Tset GBST Tset
Thold
1
Thold
2
55
56
57
58
Video Signal (Vout)
1
2
3
108 109 110 111 112 113 114 115
Figure 7: Timing of GBST-to-first Pixel of the First Sensor for both the 600/1200dpi Modes
Figures 8 and 9 show the timing of the SI/SO, which comes out in line with the 324th pixel for the 600dpi mode and with the 668th pixel for the 1200dpi mode. The SO from the first sensor enters as the SI clock of the second and subsequent sensors; hence all subsequent sensors will start their register scan after each of the preceding sensors completes its scan.
th th The last active pixel of each sensor is the 344 pixel for the 600dpi mode and 688 pixel for the 1200dpi mode.
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AMIS-721250: Contact Image Sensor
Data Sheet
1st CLK of second sensor
CLK
216
217
218
219
220
226
227
1
2
CLK numbers include timing for 55 inactive pixels and 344 active pixels
SI / SO Vout
323 324 325 326 327 328 329 330
341 342 343 344 1
Last active pixel = pixel 344
2
3
Pixel 1 of second sensor
SI/SO Timing for 600 dpi of first/second sensors
Figure 8: Timing of SI/SO Clock for the 600dpi Mode
1st CLK of second sensor
CLK
388
389
390
391
392
398
399
1
2
CLK numbers include timing for 55 inactive pixels and 688 active pixels
SI / SO Vout
667 668 669 670 671 672 673 674
685 686 687 688 1
Last active pixel = pixel 688
2
3
Pixel 1 of second sensor
SI/SO Timing for 1200 dpi of first/second sensors
Figure 9: Timing of SI/SO Clock for the 1200dpi Mode
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AMIS-721250: Contact Image Sensor
Data Sheet
9.0 Example of a CIS Module using Cascaded AMIS-721250 Image Sensors
Figure 10 shows a typical schematic of a CIS module with 15 AMIS-721250 image sensors serially cascaded together.
Figure 10: CIS Module with AMIS-721250 Image Sensors
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AMIS-721250: Contact Image Sensor
10.0 Company or Product Inquiries
Data Sheet
For more information about AMI Semiconductor, our technology and our product, visit our Web site at: http://www.amis.com North America Tel: +1.208.233.4690 Fax: +1.208.234.6795 Europe Tel: +32 (0) 55.33.22.11 Fax: +32 (0) 55.31.81.12
Production Technical Data - The information contained in this document applies to a product in production. AMI Semiconductor and its subsidiaries ("AMIS") have made every effort to ensure that the information is accurate and reliable. However, the characteristics and specifications of the product are subject to change without notice and the information is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify that data being relied on is the most current and complete. AMIS reserves the right to discontinue production and change specifications and prices at any time and without notice. Products sold by AMIS are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMIS makes no other warranty, express or implied, and disclaims the warranties of noninfringement, merchantability, or fitness for a particular purpose. AMI Semiconductor's products are intended for use in ordinary commercial applications. These products are not designed, authorized, or warranted to be suitable for use in life-support systems or other critical applications where malfunction may cause personal injury. Inclusion of AMIS products in such applications is understood to be fully at the customer's risk. Applications requiring extended temperature range, operation in unusual environmental conditions, or high reliability, such as military or medical life-support, are specifically not recommended without additional processing by AMIS for such applications. Copyright (c) 2005 AMI Semiconductor, Inc.
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